1. Field of the Invention
The present invention relates to an analog-to-digital converter (ADC), and more particularly to a self-calibrating pipeline ADC and a method of self-calibrating the pipeline ADC.
2. Description of the Related Art
An analog-to-digital converter (ADC) is a device that quantizes electric signals that are used in digital signal processing. Two factors that characterize the performance of the ADC are resolution and sampling rate. The resolution represents the smallest amount of voltage or current into which the ADC can resolve the electric signals, and the sampling rate represents how fast the ADC can quantize the electric signals into digital output data.
An ADC having high resolution and high speed is required to improve the performance of a system. Further, the ADC having high performance is required for sophisticated digital signal processing. In the conventional art, it was not easy to reduce the fabrication cost because an ADC having high performance and high speed can be implemented using hybrid devices or discrete devices at high cost. Therefore, a metal-oxide semiconductor (MOS) integrated circuit (IC) process was needed to fabricate an ADC having high performance at low cost.
However, mismatching among MOS devices may be caused by limitations of fabrication process.
Accordingly, a calibration technique is needed to detect error factors caused by process mismatching and limited device characteristics and eliminate the error factors.